(1) Field of the Invention
The present invention relates to a switching power supply apparatus and a semiconductor device having functions of operating a switching device to oscillate intermittently when a load is light.
(2) Description of the Related Art
It is generally known that switching power supply apparatuses which stably supply direct-current voltage to loads stop switching operations of switching devices intermittently, which is called intermittent oscillation, when the loads are light, in order to improve the power efficiency with light loads. In this intermittent oscillation, the number of switching events per unit time is reduced by intermittently providing suspension periods in which the switching devices suspend their switching operations. This allows for reduction in switching losses. Furthermore, as the loads become lighter, these suspension periods are controlled to be longer.
However, in a light load state such as a stand-by state, a long suspension period will lead to a decrease in an auxiliary power voltage which is used to supply a control circuit with a current, to the minimum voltage level that the control circuit can maintain its operation. This may cause some problems such as shutting down of the control circuit and an increase in power consumption of the control circuit. It is therefore necessary to prevent the auxiliary power voltage from decreasing to the minimum voltage level that the control circuit can maintain its operation.
First, the intermittent oscillation of conventional switching power supply apparatuses shall be described with reference to the drawings.
FIG. 17 is a block diagram showing an example of a configuration of a switching power supply apparatus 100 of a conventional design.
The switching power supply apparatus 100 is a fly-back power source including a transformer 101 having a primary winding 101a, a secondary winding 101b, and an auxiliary winding 101c. 
The primary winding 101a is connected in series with a switching device 108 included in a semiconductor device 106 for controlling a switching power supply. An input voltage VINp is applied to these primary winding 101a and switching device 108. When the switching device 108 is controlled to be turned on by the control circuit 109, electrical power transfers from the primary winding 101a to the secondary winding 101b in the transformer 101.
The switching operation of the switching device 108 induces alternating-current voltage in the secondary winding 101b and the auxiliary winding 101c of the transformer 101. The induced alternating-current voltage in the secondary winding 101b is rectified and smoothed by an output voltage generation circuit 102 including a diode 102a and a capacitor 102b, resulting in an output voltage VOUTp. This output voltage VOUTp is supplied to a load 107.
The output voltage VOUTp is detected by an output voltage detection circuit 104. The output voltage detection circuit 104 feeds back to the control circuit 109 a feedback signal FB_Sp, which is in accordance with the level of the detected output voltage VOUTp. This controls the switching operation of the switching device 108, thereby adjusting energy to be supplied to the load 107. Consequently, the output voltage VOUTp is stabilized at a constant level.
The alternating-current voltage is induced also in the auxiliary winding 101c. The alternating-current voltage is rectified and smoothed by an auxiliary power voltage generation circuit 103 including a diode 103a and a capacitor 103b, resulting in an auxiliary power voltage Vccp, which is used to supply the control circuit 109 with a current.
FIG. 18 is a block diagram showing an example of a configuration of a semiconductor device 106 of a conventional design for use in the switching power supply apparatus 100 shown in FIG. 17.
The semiconductor device 106 shown in FIG. 18 includes the switching device 108 and the control circuit 109. The control circuit 109 includes a start-up constant current supply 110, a regulator 111, a start-up control circuit 112, a feedback signal control circuit 113, an oscillation circuit 117a, an AND circuit 117b, a flip-flop circuit 117c, a NAND circuit 117d, a gate driver 118, a device current detection circuit 121, a comparison circuit for detecting device current 122, a comparison circuit for controlling intermittent oscillation 131, and a reference voltage source 132.
The feedback signal control circuit 113 outputs a feedback control signal Veaop, which is a voltage signal corresponding to the feedback signal FB_Sp outputted from the output voltage detection circuit 104 shown in FIG. 17. To be specific, the feedback signal control circuit 113 increases the level of the feedback control signal Veaop when the load 107 is heavier (when the feedback signal FB_Sp is smaller according to a decrease in the output voltage VOUTp), and decreases the level of the feedback control signal Veaop when the load 107 is lighter (when the feedback signal FB_Sp is larger according to an increase in the output voltage VOUTp).
The comparison circuit for detecting device current 122 compares this feedback control signal Veaop with a device current detection signal VD_Sp, which is a voltage signal corresponding to a device current IDp flowing through the switching device 108 and outputted from the device current detection circuit 121. When the device current detection signal VD_Sp increases to the feedback control signal Veaop after the switching device 108 is turned on, the comparison circuit for detecting device current 122 changes the level of a signal S_idpp which is outputted to a reset terminal R of the flip-flop circuit 117c, from a low level to a high level, thereby turning the switching device 108 off. This means that the semiconductor device 106 controls the magnitude of the device current IDp in accordance with the load 107. In other words, this semiconductor device 106 employs the PWM control in a current mode as a method of controlling the switching operation of the switching device 108.
The comparison circuit for controlling intermittent oscillation 131 compares the feedback control signal Veaop with a reference voltage Vrp which is generated by the reference voltage source 132.
The reference voltage source 132 generates a lower-limit reference voltage Vr1p and an upper-limit reference voltage Vr2p selectively as the reference voltages Vrp in order to operate the comparison circuit for controlling intermittent oscillation 131 with hysteresis.
Now, the operation of the switching power supply apparatus 100 with a light load will be explained with reference to a timing chart shown in FIG. 19.
As shown in FIG. 19, the load 107 becomes lighter from time t1p. This increases the output voltage VOUTp, leading to a decrease in the feedback control signal Veaop. Accordingly, the comparison circuit for detecting device current 122 accelerates its timing of switching the level of the signal S_idpp from a low level to a high level. This decreases a peak value IDPp of the device current IDp flowing through the switching device 108. During the continuous oscillation of the conventional switching power supply apparatus 100, the peak value IDPp of the device current IDp is thus controlled to be smaller as the output voltage VOUTp increases. The technique related to this control is disclosed in Patent reference 1 (Japanese Unexamined Patent Application Publication 2004-242439).
When the feedback control signal Veaop decreases to the lower-limit reference voltage Vr1p at time t2p, the comparison circuit for controlling intermittent oscillation 131 switches the level of a signal S_intp which is outputted to the AND circuit 117b, from a high level to a low level. In the state where the level of this output signal S_intp is low, the level of a signal which is outputted from the AND circuit 117b and inputted to a set terminal S of the flip-flop circuit 117c is held at a low level even when the flip-flop circuit 117b receives a pulse signal CLOCKp outputted from the oscillation circuit 117a. Accordingly, as in the period from time t2p to time t3p, the switching operation is suspended with the switching device 108 being not turned on.
After that, the feedback control signal Veaop increases and when the feedback control signal Veaop reaches the upper-limit reference voltage Vr2p at time t3p, the level of the output signal S_intp from the comparison circuit for controlling intermittent oscillation 131 is switched from a low level to a high level. Accordingly, as in the period from time t3p to time t4p, the switching operation resumes.
Later, when the feedback control signal Veaop decreases to the lower-limit reference voltage Vr1p again, the switching operation is suspended as in the period from time t4p to time t5p. 
The comparison circuit for controlling intermittent oscillation 131 thus controls the switching operation so that suspension periods Toffp, in which the switching operation is suspended, are provided intermittently. The intermittent oscillation is thus achieved, which leads to improvement of the power efficiency with light loads.
The following description will be directed to behavior of the auxiliary power voltage for supplying a control circuit with a current, when a load is light, in the conventional switching power supply apparatus 100 which oscillates intermittently when a load is light.
As shown in FIG. 19, during the intermittent oscillation of the switching device 108, the output voltage VOUTp increases in oscillation periods Tonp, in which the switching operation is performed, because power is supplied to the secondary side, while, the output voltage VOUTp gradually decreases in the suspension periods Toffp, in which the switching operation is not performed, because the power supply to the secondary side is suspended. Likewise, the auxiliary power voltage Vccp generated by the auxiliary power voltage generation circuit 103 shown in FIG. 17 also increases in the oscillation periods and gradually decreases in the suspension periods.
In this case, when the load 107 is light in a stand-by state or the like state, the power supply to the secondary side through the switching operation is very small and therefore, the suspension period is long. However, the power consumption by the control circuit 109 hardly changes even when the load 107 changes, with the result that, even when the load 107 is exceptionally light, the auxiliary power voltage Vccp decreases at almost the same speed as in the case with a steady load. If the auxiliary power voltage Vccp decreases, in this suspension period, to the minimum voltage level (hereinafter referred to as a minimum allowable voltage level Vccuvp) that the operation of the control circuit 109 can be maintained, the control circuit 109 becomes unable to control the switching device 108, and the operation of the control circuit 109 stops. These cause a problem that the conventional switching power supply apparatus 100 becomes unable to supply electrical power necessary for the load 107.
A known method to solve this problem is, as disclosed in Patent reference 2 (Japanese Patent 3610964), for example, to switch current supply paths so that the control circuit is supplied with a current from a drain of the switching device when the auxiliary power voltage Vccp has decreased to the minimum allowable voltage level Vccuvp.
FIG. 20 is a block diagram showing an example of a configuration of a semiconductor device 106A for use in the switching power supply apparatus, shown in Patent reference 2. This semiconductor device 106A is characterized by a configuration of a regulator 111A. A comparison circuit 119a detects that the auxiliary power voltage Vccp has decreased to the minimum allowable voltage level Vccuvp. In the semiconductor device 106A, when the auxiliary power voltage Vccp decreases to the minimum allowable voltage level Vccuvp, switches SW_A, SW_B, and SW_C included in a regulator 111A are switched on and off so that the current supply path to a control circuit 109A changes. This approach can prevent the control circuit 109A from shutting down even when the auxiliary power voltage Vccp decreases to the minimum allowable voltage level Vccuvp.
However, the drain from which a current is supplied to the control circuit 109A is higher in potential than the auxiliary power voltage Vccp, and therefore the control circuit 109A has very poor power consumption.
Other conceivable methods for reducing the decrease in the auxiliary power voltage Vccp include increasing the number of turns of the auxiliary winding 101c of the transformer 101 and increasing the capacitance of the capacitor 103b of the auxiliary power voltage generation circuit 103 in FIG. 17.
However, if the load 107 becomes even lighter and the suspension period becomes even longer, then the auxiliary power voltage Vccp inevitably decreases to the minimum allowable voltage level Vccuvp. In addition, the larger number of turns of the auxiliary winding 101c leads to an increase in the auxiliary power voltage Vccp during steady operation. In a situation, for example, where overvoltage protection is provided using the level of the auxiliary power voltage Vccp, the above circumstance may cause malfunction of this overvoltage protection. The increased capacitance of the capacitor 103b of the auxiliary power voltage generation circuit 103 leads to increases in size and cost of the switching power supply apparatus 100.
Other conventional methods to deal with the above problems will be explained below.
For example, Patent reference 3 (Japanese Patent 4096201) discloses a technique of detecting that the auxiliary power voltage has decreased to the limit level due to extended suspension periods of the intermittent oscillation, and invalidating the suspension periods.
FIG. 21A is a block diagram showing an example of a configuration of a semiconductor device 106B for use in the switching power supply apparatus, shown in Patent reference 3. Blocks corresponding to the blocks constituting the semiconductor device 106 shown in FIG. 18 are denoted by the same numerals and symbols, and explanation thereof will be omitted.
In a control circuit 109B included in the semiconductor device 106B shown in FIG. 21A, a comparison circuit for detecting auxiliary power voltage 114B compares the auxiliary power voltage Vccp with the limit level Vccthp, which is set in advance to be higher than the minimum allowable voltage level Vccuvp, and outputs a signal S_Vccp indicating a compassion result to one of input terminals of an OR circuit 120. To the other input terminal of the OR circuit 120, an output signal S_intp of the comparison circuit for controlling intermittent oscillation 131 is inputted.
FIG. 21B is a circuit diagram showing an example of a configuration of the reference voltage source 132 shown in FIG. 21A. This reference voltage source 132 selects either one of two voltage sources Vra and Vrb having different voltages in accordance with the output signal S_intp of the comparison circuit for controlling intermittent oscillation 131 and thereby generates a lower-limit reference voltage Vr1p or an upper-limit reference voltage Vr2p. 
FIG. 22 is a timing chart showing an operation of the semiconductor device 106B shown in FIG. 21A which is provided, for example, with the switching power supply apparatus 100 shown in FIG. 17 and with a light load.
As shown in FIG. 22, the suspension period is invalidated at time t9p when the auxiliary power voltage Vccp decreases to the lower-limit level Vccth1p. Accordingly, the operation shifts to continuous oscillation as in the period from time t10p to time t11p. In the continuous oscillation, the auxiliary power voltage Vccp increases. This continuous oscillation continues until the auxiliary power voltage Vccp reaches an upper-limit level Vccth2p. Patent reference 3 thus discloses a way to prevent the above problems.
In addition, a switching power supply apparatus disclosed in Patent reference 4 (Japanese Patent 4203768), for example, detects that the auxiliary power voltage has decreased to the limit level due to extended suspension periods of the intermittent oscillation, as in the case of the above Patent reference 3. The switching power supply apparatus of Patent reference 4 reduces a difference in level between the lower-limit reference voltage and the upper-limit reference voltage, which are generated by the reference voltage source. In other words, the switching power supply apparatus of Patent reference 4 reduces a width of hysteresis operation of the comparison circuit for controlling intermittent oscillation, thereby shortening the cycle of the intermittent oscillation. This results in a reduction in the suspension period. The switching power supply apparatus of Patent reference 4 thus prevents the above problems.
FIG. 23A is a block diagram showing an example of a configuration of a semiconductor device 106C for use in the switching power supply apparatus, shown in Patent reference 4. Blocks corresponding to the blocks constituting the semiconductor device 106A shown in FIG. 20 and the semiconductor device 106B shown in FIG. 21A are denoted by the same numerals and symbols, and explanation thereof will be omitted.
This semiconductor device 106C is different from the semiconductor device 106B shown in FIG. 21A in that a reference voltage source 132C included in a control circuit 109C is configured as depicted in a circuit diagram of FIG. 23B and in that an output signal S_Vccp of a comparison circuit for detecting auxiliary power voltage 114C is inputted to a reference voltage source 132C.
This reference voltage source 132C switches levels of the lower-limit reference voltage and the upper-limit reference voltage in accordance with the output signal S_Vccp of the comparison circuit for detecting auxiliary power voltage 114C, using a resistive divider, thereby controlling so that a difference in level between the lower-limit reference voltage and the upper-limit reference voltage is reduced.
In sum, the semiconductor device 106C is different from the semiconductor device 106B shown in FIG. 21A in control methods applied when the auxiliary power voltage Vccp decreases to the limit level Vccthp.
FIG. 24 is a timing chart showing an operation of the semiconductor device 106C shown in FIG. 23A which is provided, for example, with the switching power supply apparatus 100 shown in FIG. 17 and with a light load.
At time t14p in FIG. 24 when the auxiliary power voltage Vccp decreases to the lower-limit level Vccth1p, the lower-limit reference voltage changes from Vr1p to Vr3p, and the upper-limit reference voltage changes from Vr2p to Vr4p. Since the lower-limit reference voltage and the upper-limit reference voltage are set in advance to satisfy Vr1p<Vr3p and Vr2p<Vr4p, respectively, the difference in level between the lower-limit reference voltage and the upper-limit reference voltage becomes smaller than that before the time t14p. Accordingly, the width of the hysteresis operation of the comparison circuit for controlling intermittent oscillation 131 becomes smaller, resulting in a reduction in the length of the cycle of the hysteresis operation. The suspension period will therefore be shorter than that before the time t14p. To be specific, the suspension period Toff1pb is provided which is shorter than the suspension period Toff1pa provided before time t14p. 
Such a shorter suspension period leads to an increase in the minimum voltage level of the auxiliary power voltage Vccp during the suspension period, which prevents the above problems. Furthermore, in this method, the auxiliary power voltage Vccp decreases to the lower-limit level Vccth1p, and even after detection of this decrease, the intermittent oscillation continues, resulting in no increase in the switching loss, unlike Patent reference 3.